Researcher Profile

Dejan Nickovic

 Nickovic

Function

Senior Scientist

Center

Digital Safety & Security

Business Unit

Dependable Systems Engineering

E-Mail

Dejan.Nickovic(at)ait.ac.at

Phone

+43 50550 4021

Fax

+43(0) 50550-4150

Address

Tech Gate Vienna, Donau-City-Strasse 1, 1220 Vienna

  • 2004-2008: PhD student
    VERIMAG / France
  • 2008-2009: Post Doctoral Researcher
    EPFL / Switzerland
  • 2009-2011: Post Doctoral Researcher
    IST Austria / Austria
  • 2007-2007: Research Intern
    Rambus Inc. / Los Altos ,CA, USA

Publications

  • Analog Property Checkers: A DDR2 Case Study
    Author(s): Oded Maler and Dejan Nickovic
    Journal: Formal Methods in System Design (2010)
  • Monitoring Properties of Analog and Mixed-Signal Circuits
    Author(s): Oded Maler and Dejan Nickovic
    Journal: Software Tools for Technology Transfer (2013)
  • Integration of Requirements Engineering and Test-Case Generation via OSLC
    Author(s): Bernhard Aichernig, Klaus Hörmaier, Florian Lorber, Dejan Nickovic, Rupert Schlick, Didier Simoneau and Stefan Tiran
    Conference QSIC, Dallas, USA
  • Compositional Specifications for IOCO Testing
    Author(s): Przemyslaw Daca, Thomas A. Henzinger, Willibald Krenn and Dejan Nickovic
    Conference ICST, Cleveland, Ohio, USA
  • Incremental Language Inclusion Checking for Networks of Timed Automata
    Author(s): Willibald Krenn, Dejan Nickovic and Loredana Tec
    Conference FORMATS, Buenos Aires, Argentina
    Proceedings Victor A. Braberman and Laurent Fribourg; Formal Modeling and Analysis of Timed Systems - 11th International Conference; 152-167
  • Time for Mutants - Model-Based Mutation Testing with Timed Automata
    Author(s): Bernhard K. Aichernig, Florian Lorber and Dejan Nickovic
    Conference TAP, Budapest, Hungary
    Proceedings Margus Veanes and Luca Vigano; Tests and Proofs - 7th International Conference; 20-38
  • On Temporal Logic and Signal Processing
    Author(s): Alexandre Donzé, Oded Maler, Ezio Bartocci, Dejan Nickovic, Radu Grosu and Scott A. Smolka
    Conference ATVA, hiruvananthapuram, India
    Proceedings Supratik Chakraborty and Madhavan Mukund; Automated Technology for Verification and Analysis - 10th International Symposium; 92-106
  • Synchronous Interface Theories and Time Triggered Scheduling
    Author(s): Benoît Delahaye, Uli Fahrenberg, Thomas A. Henzinger, Axel Legay and Dejan Nickovic
    Conference FMOODS/FORTE 2012, Stockholm, Sweden
    Proceedings Holger Giese and Grigore Rosu; Formal Techniques for Distributed Systems - Joint 14th IFIP WG International Conference and 32nd IFIP WG International Conference; 203-218
  • Independent Implementability of Viewpoints
    Author(s): Thomas A. Henzinger and Dejan Nickovic
    Conference MONTEREY, Oxford, UK
    Proceedings Radu Calinescu and David Garlan; Large-Scale Complex IT Systems. Development, Operation and Management - 17th Monterey Workshop; 380-395
  • Dynamic Reactive Modules
    Author(s): Jasmin Fisher, Thomas A. Henzinger, Dejan Nickovic, Nir Piterman, Anmol V. Singh and Moshe Y. Vardi
    Conference CONCUR, Aachen, Germany
    Proceedings Joost-Pieter Katoen and Barbara Koenig; Concurrency Theory - 22nd International Conference; 404-418
  • Parametric Identification of Temporal Properties
    Author(s): Eugene Asarin, Alexandre Donzé, Oded Maler and Dejan Nickovic
    Conference RV, San Francisco, CA, USA
    Proceedings Sarfraz Khurshid and Koushik Sen; Runtime Verification - Second International Conference; 147-160
  • Robustness of Sequential Circuits
    Author(s): Laurent Doyen, Thomas A. Henzinger, Axel Legay and Dejan Nickovic
    Conference ACSD, Braga, Portugal
    Proceedings Luis Gomes, Victor Khomenko and Joao M. Fernandes; 10th International Conference on Application of Concurrency to System Design; 77-84
  • Property-Based Monitoring of Analog and Mixed-Signal Systems
    Author(s): John Havlicek, Scott Little, Oded Maler and Dejan Nickovic
    Conference FORMATS, Klosterneuburg, Austria
    Proceedings Krishnendu Chatterjee and Thomas A. Henzinger; Formal Modeling and Analysis of Timed Systems - 8th International Conference; 23-24
  • From MTL to Deterministic Timed Automata
    Author(s): Dejan Nickovic and Nir Piterman
    Conference FORMATS, Klosterneuburg, Austria
    Proceedings Krishnendu Chatterjee and Thomas A. Henzinger; Formal Modeling and Analysis of Timed Systems - 8th International Conference; 152-167
  • Checking Temporal Properties of Discrete, Timed and Continuous Behaviors
    Author(s): Oded Maler, Dejan Nickovic and Amir Pnueli
    Conference Pillars of Computer Science
    Proceedings Arnon Avron, Nachum Dershowitz and Alexander Rabinovich; Pillars of Computer Science, Essays Dedicated to Boris (Boaz) Trakhtenbrot on the Occasion of His 85th Birthday; 475-505
  • On Synthesizing Controllers from Bounded-Response Properties
    Author(s): Oded Maler, Dejan Nickovic and Amir Pnueli
    Conference CAV, Berlin, Germany
    Proceedings Werner Damm and Holger Hermanns; Computer Aided Verification, 19th International Conference; 95-107
  • AMT: A Property-Based Monitoring Tool for Analog Systems
    Author(s): Dejan Nickovic and Oded Maler
    Conference FORMATS, Salzburg, Austria
    Proceedings Jean-Francois Raskin and P. S. Thiagarajan; Formal Modeling and Analysis of Timed Systems, 5th International Conference; 304-319
  • From MITL to Timed Automata
    Author(s): Oded Maler, Dejan Nickovic and Amir Pnueli
    Conference FORMATS, Paris, France
    Proceedings Eugene Asarin and Patricia Bouyer; Formal Modeling and Analysis of Timed Systems, 4th International Conference; 274-289
  • Real Time Temporal Logic: Past, Present, Future
    Author(s): Oded Maler, Dejan Nickovic and Amir Pnueli
    Conference FORMATS, Uppsala, Sweden
    Proceedings Paul Pettersson and Wang Yi; Formal Modeling and Analysis of Timed Systems, Third International Conference; 2-16
  • Monitoring Temporal Properties of Continuous Signals
    Author(s): Oded Maler and Dejan Nickovic
    Conference FORMATS/FTRTFT, Grenoble, France
    Proceedings Yassine Lakhnech and Sergio Yovine; Formal Techniques, Modelling and Analysis of Timed and Fault-Tolerant Systems, Joint International Conferences on Formal Modelling and Analysis of Timed Systems, and Formal Techniques in Real-Time and Fault-Tolerant Systems; 152-166

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